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Efficient Coding Schemes for Fault-Tolerant Parallel Filters

机译:容错并行滤波器的有效编码方案

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摘要

As the complexity of communications and signal processing systems increases, so does the number of blocks or elements that they have. In many cases, some of those elements operate in parallel, performing the same processing on different signals. A typical example of those elements are digital filters. The increase in complexity also poses reliability challenges and creates the need for fault-tolerant implementations. A scheme based on error correction coding has been recently proposed to protect parallel filters. In that scheme, each filter is treated as a bit, and redundant filters that act as parity check bits are introduced to detect and correct errors. In this brief, the idea of applying coding techniques to protect parallel filters is addressed in a more general way. In particular, it is shown that the fact that filter inputs and outputs are not bits but numbers enables a more efficient protection. This reduces the protection overhead and makes the number of redundant filters independent of the number of parallel filters. The proposed scheme is first described and then illustrated with two case studies. Finally, both the effectiveness in protecting against errors and the cost are evaluated for a field-programmable gate array implementation.
机译:随着通信和信号处理系统的复杂性增加,它们具有的块或元素的数量也增加。在许多情况下,这些元素中的某些元素并行运行,对不同的信号执行相同的处理。这些元素的典型示例是数字滤波器。复杂性的增加也带来了可靠性挑战,并产生了对容错实现的需求。最近已经提出了基于纠错编码的方案来保护并行滤波器。在该方案中,每个过滤器都被视为一个位,并且引入了用作奇偶校验位的冗余过滤器来检测和纠正错误。在本摘要中,以更通用的方式解决了应用编码技术保护并行滤波器的想法。特别地,示出了滤波器输入和输出不是比特而是数字的事实使得能够进行更有效的保护。这减少了保护开销,并使冗余滤波器的数量与并行滤波器的数量无关。首先描述提出的方案,然后通过两个案例研究进行说明。最后,针对现场可编程门阵列实施方案评估了防止错误的有效性和成本。

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