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首页> 外文期刊>Applied Surface Science >Reduction of sidewall roughness in silicon-on-insulator rib waveguides
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Reduction of sidewall roughness in silicon-on-insulator rib waveguides

机译:降低绝缘体上硅肋形波导中的侧壁粗糙度

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Silicon-on-insulator (SOI) rib waveguides with residual sidewall roughness were achieved through inductive coupled plasma reactive ion etching (ICPRIE) process. Sidewall roughness is the dominant scattering loss source. Conventional ICPRIE could result in the sidewall ripples derived from the etch/deposition cycle steps. Mixed ICPRIE process and hydrogen annealing were used to improve the sidewall roughness of SOI rib waveguides and eliminate the sidewall ripples. Scan electron microscope and atomic force microscope were used to demonstrate the surface profiles of the sidewall. The results indicated that the sidewall roughness could be low down to 0.3 nm level by optimization and combination of these two techniques and the ripples disappeared. According to the scattering theory developed by Payne and Lacey, the scattering loss could be reduced to below 0.01 dB/cm. (c) 2005 Elsevier B.V. All rights reserved.
机译:通过感应耦合等离子体反应离子刻蚀(ICPRIE)工艺实现了具有残留侧壁粗糙度的绝缘体上硅(SOI)肋形波导。侧壁粗糙度是主要的散射损耗来源。传统的ICPRIE可能会导致蚀刻/沉积循环步骤产生侧壁波纹。混合ICPRIE工艺和氢退火被用于改善SOI肋形波导的侧壁粗糙度并消除侧壁波纹。使用扫描电子显微镜和原子力显微镜来证明侧壁的表面轮廓。结果表明,通过优化和结合这两种技术,侧壁粗糙度可以低至0.3 nm,波纹消失了。根据Payne和Lacey提出的散射理论,散射损耗可以降低到0.01 dB / cm以下。 (c)2005 Elsevier B.V.保留所有权利。

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