A 10 gigabit-per-second data collection system for analog to digital converters

摘要

A high speed data collection system is designed and built to allow testing of digital devices running at 10 gigabits per second. The system uses commercially available parts and consists of a signal-conditioning front end, a 1-to-16-channel data demultiplexer, an interface board, a 16-channel logic analyzer, and a personal computer. We report on the design and performance of the interface board, and the performance of the complete system whose bit-error rate was found to be 1/spl times/10/sup -7/.