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首页> 外文期刊>Applied Physics >Analytical modeling of dual-metal gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET
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Analytical modeling of dual-metal gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET

机译:双金属栅极叠层工程结累积圆柱围栏(DMGSE-CAM-CSG)MOSFET的分析建模

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摘要

This paper proposes a physics-based 2-D analytical model for a dual- material gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET. Analytical modeling is performed using 2-D Poisson's equation in cylindrical co-ordinate system based upon parabolic potential approximation. This analysis derives the expressions for center potential, electric field, subthreshold drain current, transconductance, output conductance and switching speed. It is seen that this device possesses enhanced drain current, higher transconductance and lower output conductance. The gate-induced drain leakage current for this device has also been investigated. The subthreshold slope of this device is approximately 71 mV/ decade and I_(on)/I_(off) ratio is also high, which leads to its usage for low power and high speed switching applications. The electrical characteristics and short channel effects of this device are also examined for different gate stack materials. It is observed that the device characteristics improve when permittivity of the gate stack is increased. Further, the results acquired using analytical modeling is mapped with the simulated data results to affirm and validate the device model structure. The simulation is implemented using ATLAS-3D device simulator.
机译:本文提出了一种基于物理的2-D分析模型,用于双重材料栅极堆叠工程连接无线累积模式圆柱形围栏(DMGSE-JAM-CSG)MOSFET。基于抛物线电位近似,使用圆柱形坐标系统中的2-D泊松等式进行分析建模。该分析导出了中心电位,电场,亚阈值漏极电流,跨导,输出电导和切换速度的表达式。可以看出,该装置具有增强的漏极电流,更高的跨导和降低输出电导。还研究了该装置的栅极感应漏极漏电流。该设备的亚阈值斜率约为71 mV /十年,并且I_(开启)/ I_(OFF)比率也很高,这导致其对低功耗和高速切换应用的使用。还检查了该装置的电特性和短沟道效果,用于不同的栅极堆叠材料。观察到,当栅极堆叠的介电常数增加时,器件特性改善。此外,使用分析建模获取的结果是用模拟数据结果映射的,以确认和验证设备模型结构。使用ATLAS-3D设备模拟器实现模拟。

著录项

  • 来源
    《Applied Physics》 |2021年第7期|520.1-520.10|共10页
  • 作者单位

    Department of Electronics and Communication Engineering Delhi Technological University Shahbad Daulatpur Delhi 110042 India;

    Department of Electronics and Communication Engineering Delhi Technological University Shahbad Daulatpur Delhi 110042 India;

    Department of Electronics and Communication Engineering Maharaja Agrasen Institute of Technology Rohini Delhi 110086 India;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Analytical model; Cylindrical surrounding gate; Junctionless accumulation mode; Parabolic potential approximation;

    机译:分析模型;圆柱形围门;无连接累积模式;抛物线潜在近似;

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