This paper presents a novel NTSC video sync separator (NSS) with a high-PSR (power supply rejection) bias generation circuitry (BGC) which comprises a temperature compensation circuitry. The proposed BGC utilizes step-down regulators and a bandgap-based bias with cascode current control. The clamping voltages required for sync separation from an NTSC signal are generated. Detailed PSR analysis of the proposed BGC is also derived to circumscribe the clamping voltage variation. The proposed design is carried out using 0.35 μm 2P4M CMOS process. The measurement results verify that the HSYNC, the composite signal, and the Line 21 caption data can be separated successfully even if a 1 V noise is coupled in the supply voltage. The measured power consumption of the proposed chip is 31.92 mW.
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