On-chip low drop-out voltage regulator with NMOS power transistor and dynamic biasing technique

摘要

We propose a NMOS low drop-out voltage regulator suitable for on-chip power management. The circuit does not requires any external components for achieving compensation since it is internally compensated. A dynamic biasing strategy and a clock booster allows to properly drive the NMOS power transistor in a power efficient fashion and without limiting the speed response of the regulator. Transistor level simulations confirm the effectiveness of the proposed approach.