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首页> 外文期刊>Advanced Materials >Room-Temperature Fabrication of Ultrathin Oxide Gate Dielectrics for Low-Voltage Operation of Organic Field-Effect Transistors
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Room-Temperature Fabrication of Ultrathin Oxide Gate Dielectrics for Low-Voltage Operation of Organic Field-Effect Transistors

机译:用于有机场效应晶体管的低压操作的超薄氧化栅极电介质的室温制备

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摘要

Organic field-effect transistors (OFETs) are attractive building blocks for low-cost electronic devices such as radio-frequency identification (RFID) tags, sensors, electronic paper, and backplane circuits for active-matrix displays. Low-voltage operation of OFETs is necessary for practical applications, hence the need to develop gate dielectrics with a high areal capacitance. To this end, ultrathin dielectric layers have been demonstrated based on self-assembled-monolayer (SAM) chemistry. In these cases, the formation of the dielectric layer relies on specific surface chemistries and therefore these approaches may not be suitable for the deposition of blanket layers on arbitrary substrates. For the same reason, the robustness and yield may be problematic due to the critical roles that surface cleanliness and roughness play on binding.
机译:有机场效应晶体管(OFET)是低成本电子设备(如射频识别(RFID)标签,传感器,电子纸和有源矩阵显示器的背板电路)有吸引力的构件。 OFET的低电压操作对于实际应用是必需的,因此需要开发具有高面电容的栅极电介质。为此,已经基于自组装单层(SAM)化学方法证明了超薄介电层。在这些情况下,电介质层的形成取决于特定的表面化学性质,因此这些方法可能不适合在任意基板上沉积毯覆层。出于相同的原因,由于表面清洁度和粗糙度在粘合中起着至关重要的作用,因此坚固性和良率可能会成问题。

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  • 来源
    《Advanced Materials》 |2011年第8期|p.971-974|共4页
  • 作者单位

    Department of Materials Science and Engineering Stanford University Stanford, California 94305, USA;

    Palo Alto Research Center 3333 Coyote Hill Road, Palo Alto, California 94304, USA;

    Department of Chemistry Imperial College of London South Kensington Campus, London SW7 2AZ, UK;

    Department of Materials Science and Engineering Stanford University Stanford, California 94305, USA;

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