Back Gated Multilayer InSe Transistors with Enhanced Carrier Mobilities via the Suppression of Carrier Scattering from a Dielectric Interface

摘要

Graphene-like two-dimensional (2D) layered semiconductors hold great promise for next generation nanoelectronics devices after the silicon era. These 2D layered semiconductors exhibit structural characteristics of unique dimensionality, ultrathin thickness and atomic flatness, which are attractive for miniaturization and high performance of electronic devices. 2D structure offers compatibility to silicon based COMS processing, such as photolithography for large-scale fabrication. Ultrathin thickness allows better electrostatic control of electrical conductivity, and significant device downscaling for high density integration. Atomically flat surface together with the absence of dangling bonds make 2D semiconductors free from carrier scattering caused by surface roughness, so that 2D semiconductors based transistors could outperform silicon devices in scaling limitation. A number of studies have been made in field effect transistors (FET), a central building element for logic circuit, by exploiting rnonolayer or few-layer 2D semiconductors as transport channel. So far, 2D layered materials used in FETs fabrication are mainly transition metal dichalco-genides (TMDs) of 2D molybdenum disulfide (MoS_2) and selenium tungsten (WSe_2). However, it has been demonstrated that MoS_2 is an undesirable material for high performance electronics applications because of heavier electron effective mass (m~* = 0.45 m_0) and low room temperature mobility of 50 ～ 200 cm~2V~(-1)S~(-1). The reported ultrathin MoS_2 channels show low carrier mobility of μ ～ 1-50 cm~2V~(-1)s~(-1). Several strategies have been demonstrated to improve the performance of ultrathin MoS_2 FETs, including exploiting high k dielectrics or decreasing the contact barrier. Multilayer MoS_2 on Al_2O_3 substrate show improved mobility of μ ＞ 100 cm~2V~(-1)s~(-1) and good sub-threshold swings. Encapsulating MoS_2 in high-K dielectric or a polymer electrolyte enhanced the mobility up to ～160 cm~2V~(-1)s~(-1). With PMMA/Al_2O_3 bilayer dielectric, the mobility of multilayer MoS_2 FETs is increased to 500 cm~2V~(-1)s~(-1), however, the intrinsic mechanism for this mobility improvement is still not well understood. Very recently, two-terminal measurements of few-layer black phosphorus FETs show a carrier mobility of 284 cm~2V~(-1)s~(-1) at room temperature, which is much higher than that of MoS_2 FETs. However, few layer black phosphorus is less stable than graphene and MoS_2. In general, it is very challenging to enhance carrier mobilities of layered semiconductor devices.