Printed, Flexible, Organic Nano-Floating-Gate Memory: Effects of Metal Nanoparticles and Blocking Dielectrics on Memory Characteristics

摘要

The effects of using a blocking dielectric layer and metal nanoparticles (NPs) as charge-trapping sites on the characteristics of organic nano-floating-gate memory (NFCM) devices are investigated. High-performance NFCM devices are fabricated using the n-type polymer semiconductor, poly([N,N'-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)} (P(NDI2OD-T2)), and various metal NPs. These NPs are embedded within bilayers of various polymer dielectrics (polystyrene (PS)/ poly(4-vinyl phenol) (PVP) and PS/poly(methyl methacrylate) (PMMA)). The P(NDI2OD-T2) organic field-effect transistor (OFET)-based NFCM devices exhibit high electron mobilities (0.4-0.5 cm~2 V~(-1) s~(-1)) and reliable non-volatile memory characteristics, which include a wide memory window (≈52 V), a high on/off-current ratio (I_(on)/I_(off)≈ 10~5), and a long extrapolated retention time (＞10~7 s), depending on the choice of the blocking dielectric (PVP or PMMA) and the metal (Au, Ag, Cu, or Al) NPs. The best memory characteristics are achieved in the ones fabricated using PMMA and Au or Ag NPs. The NFCM devices with PMMA and spatially well-distributed Cu NPs show quasi-permanent retention characteristics. An inkjet-printed flexible P(NDI2OD-T2) 256-bit transistor memory array (16 × 16 transistors) with Au-NPs on a polyethylene naphthalate substrate is also fabricated. These memory devices in array exhibit a high I_(on)/I_(off) (≈10~(4±0.85)), wide memory window (≈43.5 V ± 8.3 V), and a high degree of reliability.