一种基于VHDL实现的数字信号的滤波方法

摘要

提出并以VHDL语言实践了一种实时滤波方法在方波毛刺信号上的应用, 以FPGA作为硬件, 通过软件延时的方法滤除毛刺, 输出宽脉冲, 从而实现对较窄毛刺的滤波功能.本文阐述了该方法的原理和实现方法, 分析了该方法对信号精度的影响, 并通过仿真论证了该方法的可行性以及应用范围.%This paper presents and practices a real time filtering method of VHDL and applies it to square signal with burr. Using FPGA as hardware, it filters out burr and outputs wide pulse by the means of software delaying, so as to realize filtering. This paper introduces the principle and implementation method, analyzes its influence on signal accuracy, and demonstrates the feasibility and application range of the method by simulating.