基于PCI9054与FPGA的高速低电压差分信号接收器设计

摘要

在图像处理和一些特珠应用中,需要在较远距离上高速传输数据,现有的标准串行接口无法同时满足传输距离和传输速率的要求,因此需要设计一种新的高速串行通信方案.本文基于PCI总线较高的数据吞吐率,设计了一种以PC19054为桥接芯片,FPGA为局部总线控制器,高速双端口RAM为接收缓冲器并采用中断与DMA传输方式相结合的高速低电压差分信号(LVDS)实现方案,通过实验脸证,该方案通信速率达到了50Mb/s,%The image processing and some special applications require the data transmission of high-speed and distance, but the standard serial interface can not satisfies the requirement at once, a new design of high-speed serial communication is necessary.A design based on the property of high-speed transmission of PCI bus is given by this paper, it used PCI9054 as bridge chip ,FPGA as local bus controller ,high-speed double-port RAM as a buffer ,and adopted high-speed LVDS transmission which used interrupt and DMA mode ,the experiments showed that communication speed can reach 50Mb / s.