基于FPGA的无人机图像去噪与压缩算法及仿真

摘要

图像去噪与压缩是无人机完成对地观测任务中图像处理的关键步骤,其性能制约着后续图像的处理速度.提出了一种基于提升小波变换的图像去噪与压缩相融合的算法,并以FPGA为平台,采用Ver-ilog HDL编程实现.在设计过程中,优化了算法流程和乘法器结构,之后采用ModelSim软件进行仿真.仿真结果表明,在FPGA上实现该算法可以有效去除图像中的噪声,并实现图像的高效压缩.%Image de-noising and compression is the key steps of image processing to implement the tasks of earth observation for UAV( unmanned air vehicle). An algorithm of image de-noising and compression based on lifting wavelet transform is proposed, which takes FPGA as platform and uses Verilog HDL programming. During the course of designing, by improving the algorithm flow and optimizing the structure of multiplier, the algo rithm is verified through simulation test by using ModelSim software. The results of simulation show that this algorithm can effectively eliminate the noise in the image and compress the image.