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面向SDR应用的向量存储器的设计与优化

             

摘要

To meet the high memory bandwidth of SDR-oriented SIMD DSPs, a novel Vector Memory( VM) architecture is proposed. The VM consists of 16-wsy Vector Memory Blocks( VBs), and each VB contains two groups of multi-bank memory structure with low-order interleaved addressing. This structure aims at reducing the memory access conflicts, making best use of the bandwidth of the multi-bank memory, and realizing the parallel vector data accesg at the cost of low power consumption. Besides, a vector rearrangement unit is designed and implemented in the VM to support the 16-way unaligned SIMD vector access and share the VM space. Experimental results show that the proposed VM architecture can efficiently reduce or eliminate the data shuffling operations and speed up SDR applications.%针对面向SDR应用的SIMD数字信号处理器高带宽数据访存需求,提出并实现了一种新型的向量存储结构.该向量存储器由16路向量存储块构成,每路采用两组多体低位地址交叉编址存储结构,减少了访存体冲突,充分利用多存储体带宽,以较小的功耗代价实现并行访问多个向量数据.在此基础上,还设计了一种向量访存重整理单元,使向量存储器可灵活支持多路SIMD结构向量处理单元的非对齐访问,实现了其对向量存储器的共享.测试结果表明,该向量存储器能有效减少或消除向量处理单元之间的数据混洗操作,加速相关应用算法.

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