The classical clipper,achieved by multiplier and divider,is resource intensive and low clock rate running.Altera has designed a CORDIC clipper,which used shifting,addition or subtraction operation instead of the complex multiplication and division.However,Altera's clipper has two individual CORDIC modules,whose communication relies on the phase rotation generated by CORDIC1.The communication is challenging in high-speed design.This paper presents an improved CORDIC clipper,completing magnitude computation and limiting vector rotation in one CORDIC module,reducing hardware overhead and improving clock speed.The simulation results show that,compared to the classical clipper,the improved CORDIC clipper reduces nearly half of resource consumption.In addition,the maximum clock frequency is increased by about 2.4 times.%提出了一种改进的CORDIC限幅器,实现了在同一模块中完成幅值计算和限幅向量的旋转两种操作,减少了硬件开销,提高了时钟运行速率。仿真表明,相比于传统限幅器,改进的CORDIC限幅器减少了近一半的资源占用,同时,设计的时钟速率提高了约2.4倍。
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