可重构 RISC 微处理器的 FPGA 实验方案的研究

摘要

利用FPGA的可重构特性，设计了一个基于精简指令系统的微处理器。该处理器采用微程序控制器思想，可完成指令的译码、执行以及数据的加工处理，通过Altera公司的QuartusⅡ9．0软件并结合EDA技术完成了核心电路的设计，硬件平台是型号为EP2C8Q240C8的FPGA芯片。该实验方案优势在于开发成本低、功耗低、可重构性，对设计成果进一步改进可适用于大多数嵌入式系统，其硬件可重构的特点对于提高信息安全性也有一定的作用。%The paper designs a RISC-based microprocessor using the reconfigurability of FPGA.By using MCU concept, the microprocessor is capable of instruction decoding &execution and data processing.Its core circuit is designed by using Altera Company's software QuartusⅡ9.0 and combining EDA technology, and its hardware platform is the FPGA chip of model EP2C8Q240C8.The experimental scheme has the advantages of low cost of development, low power consumption and reconfigurability.After further improvement, the design result is applicable to most embedded systems, and the reconfigurability of hardware contributes to information security to some extent.