基于 FPGA 的 ARM 并行总线研究与仿真

摘要

通过 EP2C20Q240器件和 LPC2478处理器，研究 ARM 应用系统外部并行总线的工作原理和时序特性，以及在 FPGA 中进行双向总线设计的原则，设计并实现了 FPGA 并行总线。借助 Quartus II 仿真工具，对 FPGA 并行总线进行了时序仿真，并用SignalTap II 逻辑分析仪进行在线测试，验证设计的正确性。%With EP2C20Q240 device and LPC2478 processor,This paper analyzes the principle of ARM external parallel bus and sequence characteristics,as well as FPGA bidirection IO port design principles,designs the parallel bus interface of FPGA.With the Quartus II Simulation tools,the FPGA external parallel bus interface were simulated,and tested in circuit by SignalTap II logic analyzer.