图像实时处理系统日益发展，这无疑对FPGA的广泛应用提供了良好的平台。针对在某些领域传统的中值滤波算法无法快速有效的对采集到的图像进行处理，采用改进中值滤波利用FPGA运行速度快、内部程序并行运行等优点，设计出具有高实时性、高灵活性的图像预处理系统。通过中值滤波算法特点运用Verilog硬件描述语言进行代码编写，并在Quartus II、Modelsim进行实现仿真，最后与MATLAB中值滤波仿真图及多级中值滤波进行对比，得出利用FPGA处理改进中值滤波不但能够顺利对图像进行中值滤波，而且具有运算速度快、低能耗的特点。%The development of image real-time processing system has brought a good platform of the widespread use of FPGA. Aiming at the problem that traditional median filter algorithm cannot process collected images quickly and efficiently, this paper adopts improved median filter and makes use of advantages, such as fast running speed, parallel running of inner program, to design an image preprocessing system with high real time ability and high flexibility. Using the features of median filter and Verilog hardware description language to code. And then realize simulation in Quartus II and Modelsim. At last, compared with MATLAB median filter simulation figure and multilevel median filter, it has shown that using FPGA to process and improve median filter can not only conduct median filter to images successfully, but also has the ability of fast operation speed and low energy consumption.
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