首页> 中文期刊> 《计算机应用与软件》 >众核网络处理器下高速包转发系统设计与实现

众核网络处理器下高速包转发系统设计与实现

     

摘要

Rapid development of Internet requests network devices be capable of supporting the forwarding ability by over ten millions packets per second,the key to implement this function relies on the organisation structure of routing table,the fast routing lookup algorithm and high performance hardware platform.We designed and implemented the multi-core network processor-based High-speed IP packets forwarding system.It uses Tile-Gx36 multi-core network processor as the hardware platform,adopts the Hash-based prefix length routing lookup algorithm and the multi-bit Trie tree routing lookup algorithm,learns from the advantage of Hash-based prefix length routing table lookup algorithm in storage and retrieval,and combines the query efficiency of multi-bit Trie tree-based routing table lookup algorithm.It stores the routing table in level L2 cache,thus further improves both the routing table access speed and the query bit rate.Experimental results showed that for data packet systems with different load sizes,this system can meet the forwarding rate of 40 Gbps all.%互联网的快速发展要求网络设备能够支持每秒几百万以上分组的转发能力,实现这一功能的关键是路由表的组织结构、快速的路由查找算法和高性能的硬件平台支持。设计并实现基于众核网络处理器的高速 IP 包转发系统,使用 Tile-Gx36众核网络处理器作为硬件平台,采用基于 Hash 的前缀长度和多分支 Trie 树的路由查找算法,借鉴基于 Hash 的前缀长度路由表查找算法在存储和检索上的优势,并结合基于多分支 Trie 树路由表查找算法的查询效率,将路由表存储于 L2层缓存中,进一步提高了路由表的访问速度和查询命中率。实验结果表明,对于不同大小负载的数据包系统均能满足40 Gbps 的转发速度。

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