2.1 GHz射频CMOS混频器设计

摘要

设计了一个用于第三代移动通信的2.1 GHz CMOS下变频混频器,采用TsMC 0.25 μm CMOS工艺.在设计中,用LC振荡回路作电流源实现低电压;并用增大电流和降低跨导的方法提高线性度.在Cadence RF仿真器中对电路进行了模拟,在1.8 V电源电压下,仿真结果为:1 dB压缩点PtdB-10.65 dBm,lIP3 1.25 dBm,转换增益7 dB,噪声系数10.8 dB,功耗14.4 mW,且输入输出端口实现了良好的阻抗匹配.并用Cadence中的Virtuoso Layout Editor软件绘制了电路的版图.%A 2.1 GHz CMOS down-conversion mixer which iS intended for using in 3 G iS designed based on TSMC 0.25 tan CMOS technology.In this design,a LC oscillating circuit is used to realize the low-vohage design of the current source,and the methods of increasing current and decreasing transconductance are used tO improve the line-arity.The circuit is simulated in the RF emulator of Cadence under 1.8 V supply voltage,and results Of simulation are 1 dB compression point of-10.65 dBm,IIP3 of 1.25 dBrn,the conversion gain of 7 dB,the noise figure of 10.8 dB,and the power consumption of 14.4 mW.There is a good impedance matching between input ports and output ports.And,the layout of the mixer is drawn by means of the Virtuoso I.ayout Editor.