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Testing and diagnosis for systematic defects based on design-for-manufacturability guidelines.

机译:基于可制造性设计准则的系统缺陷的测试和诊断。

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摘要

The occurrence of systematic defects is increasing with shrinking feature sizes of manufacturing processes. Design-for-manufacturability (DFM) rules and guidelines are layout constraints that are followed for ensuring yield and manufacturability. In spite of the use of DFM rules and guidelines, systematic defects may occur because complete information about process and fabrication defects is not available due to the decreasing window of time to market and the constraints on layout geometry.;Noting that DFM guidelines already predict the most important sources of systematic defects, DFM guidelines are used in this dissertation as a basis for modeling, test generation and diagnosis for systematic defects. The basic process we use for this purpose is the following. Layout locations that are potential sites for systematic defects are found by tightening DFM guidelines. Affected transistors are identified at the schematic level, and defect behaviors are translated to gate level logic faults. Fault grading is applied to identify potential test holes. Additional test content is generated for improving test quality. Experimental results of this process were obtained for an Intel Pentium R 4 design demonstrating the feasibility of linking systematic defects and DFM guidelines.;The methodology is extended to prioritize layout locations according to the importance of applying DFM guidelines to them. A higher priority is given to layout locations where failure to follow a DFM guideline will result in test holes due to defects that are hard-to-detect. The prioritized list can be used by layout tools to create circuits that are easier to test for systematic defects.;We also investigate the use of DFM guidelines during the defect diagnosis process with the goal of identifying which DFM guidelines are responsible for the defects present in failing chips. We introduce a new metric called diagnostic coefficient that allows us to rank the guidelines according to their contribution of hard-to-diagnose defects. DFM guidelines that are ranked high should be applied earlier in order to obtain circuits that are easier to diagnose for systematic defects.
机译:随着制造工艺特征尺寸的缩小,系统性缺陷的发生率也在增加。可制造性设计(DFM)规则和准则是布局约束,必须遵循这些约束以确保成品率和可制造性。尽管使用了DFM规则和准则,但由于面市时间缩短和布局几何形状的限制而无法获得有关工艺和制造缺陷的完整信息,因此可能会出现系统性缺陷。作为系统缺陷的最重要来源,本文使用DFM指南作为系统缺陷建模,测试生成和诊断的基础。我们用于此目的的基本过程如下。通过收紧DFM指南,可以找到可能存在系统缺陷的布局位置。在原理图级别识别受影响的晶体管,并将缺陷行为转换为栅极级别的逻辑故障。应用故障分级来识别潜在的测试孔。会生成其他测试内容以提高测试质量。该过程的实验结果是针对Intel Pentium R 4设计获得的,证明了将系统缺陷与DFM准则相链接的可行性。该方法已扩展为根据对DFM准则应用布局的重要性来确定布局位置的优先级。布局位置的优先级较高,在这些位置中,由于难以检测到的缺陷而未能遵循DFM准则将导致测试孔。布局工具可以使用优先级列表来创建更易于测试系统缺陷的电路。;我们还研究了在缺陷诊断过程中使用DFM准则的目的,目的是确定哪些DFM准则导致了系统中存在的缺陷失败的筹码。我们引入了一种称为诊断系数的新度量标准,该度量标准使我们可以根据准则对难以诊断的缺陷的贡献对其进行排名。为了获得更易于诊断系统缺陷的电路,应尽早应用排名较高的DFM指南。

著录项

  • 作者

    Kim, Dongok.;

  • 作者单位

    Purdue University.;

  • 授予单位 Purdue University.;
  • 学科 Engineering Computer.;Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2010
  • 页码 93 p.
  • 总页数 93
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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