Electrical properties of grain boundaries in silicon, including trapped charge, potential barrier, localized states, and their distributions, have been investigated. Materials with well-defined boundaries are prepared from boron doped Czchroalski grown silicon bicrystals. The major experimental techniques are zero-bias resistance, zero-bias capacitance, and deep level transient spectroscopy (DLTS) measurements. This is the first study on the electronic states at grain boundaries using DLTS measurements. An approximate method using a computer algorithm to interpret the DLTS signals of continuously distributed states in the energy band gap at grain boundaries has been developed in this study.; A new model which involves non-uniformity of the spatial distribution of boundary states is proposed, in which the barrier is not uniform over the entire boundary plane at thermal equilibrium and the current density through the boundary is not uniformly distributed under bias conditions.; A detailed analysis of DLTS data reveals that the distribution of the boundary states is continuous in the energy band gap and the density of states increases exponentially as the state moves away from the energy band edge, i.e., the deeper the state, the higher is the density. These results provide the first experimental evidence for the hypothesis which has been commonly used in the study of the grain boundary.; The dependence of the activation energy of the grain boundary on the tilt angle and the boundary orientation are also studied. The results indicate a trend that the activation energy is greater for a larger tilt angle. This result is consistent with the tilt angle dependence of structural defects.; In the study of the effects of heat-treatment, the results indicate that grain boundary defects increase after the samples were subjected to high temperature processing (600(DEGREES)C to 900(DEGREES)C).
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