The Voronoi cell method for two- and three-dimensional semiconductor device simulation.

摘要

The formulation and testing of a new method of simulating the steady-state operation of semiconductor devices, as described by Poisson's equation and the drift-diffusion form of the current equations, is discussed in this thesis.; This work is based on two ideas: The first is that the existing successful device simulation methods are all based fundamentally on the same technique for discretizing the semiconductor device equations, but do not take full advantage of its generality and potential. This technique is to divide the device representation into a mesh of non-overlapping cells on which the electric and carrier fluxes are conserved. Secondly, it is shown that this basic discretization technique is fully exploited by applying it to a mesh based on the geometric constructs called Voronoi polyhedra.; The relationship between the mathematical discretization of the semiconductor device equations and the Voronoi polyhedra is discussed and its advantages over the existing two- and three-dimensional methods are noted. The computational technique used to construct the Voronoi meshes, called Delaunay tesselation, is explained, as are the mathematical procedures used to solve the simulation problems. A variety of semiconductor structures are then simulated using the Voronoi cell method. It is shown to be robust, physically consistent and significantly more versatile than existing simulation methods.