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A surface micromachined accelerometer with integrated CMOS detection circuitry.

机译:具有集成CMOS检测电路的表面微机械加速度计。

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摘要

A surface micromachined, capacitive accelerometer is described which integrates the mechanical sensing microstructures with CMOS detection circuits. The capacitive sensing structure consists of two polysilicon layers with the sensing and feedback electrodes underneath and the suspended plate as the proof mass. The sensing axis is perpendicular to the substrate. A full capacitive bridge is formed to translate a mechanical displacement signal into an electrical voltage signal. Electrostatic feedback is used to counteract the proof mass displacement due to acceleration. Interdigitated fingers are employed to generate levitation force using the asymmetrical distribution of electrical fields. A unity gain buffer with low input capacitance is designed to actively drive the ground plane to minimize the parasitic capacitance.; {dollar}Sigma{dollar}-{dollar}Delta{dollar} modulation technique is employed as the feedback control loop where the mechanical proof mass used is the double integrator in the 2nd-order {dollar}Sigma{dollar}-{dollar}Delta{dollar} modulator. Its digital output is used for the electrostatic feedback so that the feedback force is linearly proportional to the pulse density of the feedback pulse train. Two clock phases are used for separate sensing and feedback in order to eliminate the feedback from the capacitive feedback. A dual loop design where two identical accelerometers except their ratioed mass are built side by side is employed to cancel the potential drifts from residual stress and environmental changes by subtracting the two digital outputs.; The accelerometer is fabricated using surface micromachining process with one structural polysilicon layer for the suspended proof mass. Modular Integration of CMOS and microStructure (MICS) process is developed that enables the integration of CMOS and microstructure processes in a modular fashion. In MICS process, the CMOS circuitry is metallized with tungsten and TiSi{dollar}sb2{dollar}/TiN diffusion barrier is used at contacts. A nitride layer is used to passivate the CMOS circuits from subsequent etching processes. A typical double-poly surface micromachining process is used to fabricate the capacitive sensing structures. Rapid-thermal process (RTP) is developed for phosphosilicate glass densification and polysilicon stress annealing.; The prototype accelerometer is fabricated using a typical double polysilicon surface micromachining process for microstructures and a 3{dollar}mu{dollar}m conventional CMOS process for the electronics. The total chip size is 2.5mm x 5mm. The unity gain buffer has a gain of 0.9 and 500kHz bandwidth which is limited by the parasitic capacitance from the measurement setup. The gain of the variable gain amplifier can vary from unity to 40 and is controlled externally. The accelerometer is first characterized in the open-loop self-testing mode. The damping coefficient is measured to be {dollar}1.2times10sp{lcub}-3{rcub}{dollar} N/(m/s) which agrees with {dollar}1times10sp{lcub}-3{rcub}{dollar} N/(m/s) from theoretical analysis. The open-loop sensitivity of the accelerometer is 100mV/g with 100mV of driving voltage. Stiction of suspended microstructures is observed and various possible solutions are discussed.
机译:描述了一种表面微加工的电容式加速度计,它将机械感测微结构与CMOS检测电路集成在一起。电容式感应结构由两层多晶硅层组成,下面有感应电极和反馈电极,而悬浮板则作为检测质量。感测轴垂直于基板。形成全电容电桥以将机械位移信号转换为电压信号。静电反馈用于抵消由于加速度引起的标准质量位移。交叉指状电极用于通过电场的不对称分布产生悬浮力。具有低输入电容的单位增益缓冲器旨在主动驱动接地层,以最大程度地减小寄生电容。 {dollar} Sigma {dollar}-{dollar} Delta {dollar}调制技术被用作反馈控制回路,其中所使用的机械验证质量是二阶{dollar} Sigma {dollar}-{dollar}的双积分器Delta {dollar}调制器。其数字输出用于静电反馈,因此反馈力与反馈脉冲序列的脉冲密度成线性比例。为了消除电容性反馈中的反馈,使用了两个时钟相位分别进行感测和反馈。采用双回路设计,其中两个相同的加速度计(除比例质量外)并排建立,用于通过减去两个数字输出来消除残余应力和环境变化引起的潜在漂移。加速度计是使用表面微机械加工工艺制造的,其中一个结构多晶硅层用于悬挂检测质量。开发了CMOS和微结构(MICS)工艺的模块化集成,从而可以以模块化方式集成CMOS和微结构工艺。在MICS工艺中,CMOS电路用钨金属化,并且在触点处使用TiSi {sb2 {dollar} / TiN扩散势垒。氮化物层用于钝化来自随后的蚀刻工艺的CMOS电路。典型的双多晶硅表面微加工工艺用于制造电容感测结构。开发了快速热工艺(RTP),用于磷硅玻璃的致密化和多晶硅应力退火。原型加速度计是使用典型的用于微结构的双多晶硅表面微机械加工工艺和用于电子学的3微米常规CMOS工艺制造的。芯片总尺寸为2.5mm x 5mm。单位增益缓冲器的增益为0.9和500kHz,带宽受测量设置中的寄生电容限制。可变增益放大器的增益可以在1到40之间变化,并由外部控制。加速度计首先以开环自检模式为特征。测得的阻尼系数为{dollar} 1.2×10sp {lcub} -3 {rcub} {dollar} N /(m / s),与{dollar} 1×10sp {lcub} -3 {rcub} {dollar} N /理论分析得出的(m / s)。加速度计的开环灵敏度为100mV / g,驱动电压为100mV。观察到了悬浮微结构的静摩擦,并讨论了各种可能的解决方案。

著录项

  • 作者

    Yun, Weijie.;

  • 作者单位

    University of California, Berkeley.;

  • 授予单位 University of California, Berkeley.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 1992
  • 页码 165 p.
  • 总页数 165
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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