An efficient method for analyzing general distributed-lumped interconnect networks with linear or nonlinear loads for transient simulation is presented. The method is based on scattering parameter techniques. The reduced-order approximate models of linear networks with multiple inputs and outputs can be obtained in one pass of reduction. Only two operations are used to do circuit reduction. The circuit partition is efficiently combined with the circuit reduction process to speed up the reduction process, decrease the simulation time and achieve the high accuracy using lower order approximation. The partition is very suitable for large interconnect networks with large number of external ports. For transmission line networks, we can easily capture time-of-flight delay explicitly during the reduction, which greatly improves the accuracy of the macromodel. Mixed Exponential Functions (MEFs) are used to approximate the scattering parameters of the macromodel. MEF preserves the high accuracy of Pade approximation and yield a guaranteed stable solution. With recursive convolution formulas, the macromodel has been integrated into SPICE-like simulators. The interconnect networks with nonlinear terminations also can be analyzed by replacing the linear parts with lower order equivalent circuits. We developed a practical circuit reduction method to reduce large RC interconnect networks into lower order equivalent RC circuits. In conjunction with the macromodel with explicit convolution formulas, a CMOS driver model is also presented for the transient analysis and power dissipation analysis. The model takes into account the input slope effects, CMOS nonlinear effects and load interconnect effects. The macromodel and the driver model provide accuracy comparable to that of SPICE, with one or two orders of magnitude less computing time.
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