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Applications of regenerative feedback in integrated circuits.

机译:再生反馈在集成电路中的应用。

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This thesis presents the use of regenerative feedback repeaters to speed up the signal propagation along RC lines and transmission lines on or at the periphery of integrated circuits. Such regenerative feedback repeaters locally regenerate the new level after detecting a transition. The local regeneration shorts out the resistive path from the input, and speeds up the transition on further nodes. This operating principle is similar to the signal propagation in nerve axons, and offers advantages in performance, power consumption, and use of resources.; The example of bidirectional, programmable interconnections through MOS transistors in Field Programmable Gate Arrays is used to introduce precharged, postcharged and complementary regenerative feedback repeaters. Through circuit simulations and measurements on a 1.2{dollar}mu{dollar}m CMOS test chip, it is shown that regenerative feedback repeaters are faster and smaller than conventional repeaters. It is also shown that there are limitations on the types of signals that can be propagated by feedback repeaters. Precharged repeaters require monotonic signals. Postcharged repeaters require pulses. Complementary repeaters can propagate both rising and falling transitions, but, to avoid metastability, require glitch-free signals. As a result, it is not possible to simply replace the inserted repeaters in a conventional FPGA by feedback repeaters, without compromising the zero error rate. Instead, non-conventional FPGA architectures in which only the correct signal types appear on the interconnection networks must be used. These architectures are more complex in hardware, and some of them require retiming of the logic implementation, which may have a considerable impact. On an equal area basis, the performance improvement of these alternative architectures is substantial, even after taking into account a large penalty factor for retiming.; It is also shown that the fast signal propagation through MOS transistors with precharged regenerative feedback repeaters can be combined with complementary pass transistor logic and elements of Domino logic, to obtain a dynamic CMOS logic family that is faster than Domino logic.; Finally, it is shown that by using a complementary regenerative feedback repeater at the receiving end of a transmission line, the driver impedance range of reliable first incidence switching can be extended compared to source-matching.
机译:本文提出了利用再生反馈中继器来加快信号在集成电路外围或外围沿RC线和传输线的传播。这样的再生反馈中继器在检测到转变后局部地再生新的电平。本地再生会缩短输入端的电阻路径,并加快其他节点上的过渡。该工作原理类似于神经轴突中的信号传播,并在性能,功耗和资源使用方面具有优势。通过现场可编程门阵列中的MOS晶体管进行双向可编程互连的示例用于引入预充电,后充电和互补再生反馈中继器。通过对1.2μmCMOS测试芯片的电路仿真和测量,表明再生反馈中继器比常规中继器更快,更小。还表明,反馈中继器可以传播的信号类型受到限制。预充电的中继器需要单调信号。后充电的中继器需要脉冲。互补中继器既可以传播上升沿也可以传播下降沿,但是为了避免亚稳态,需要无干扰信号。结果,不可能在不牺牲零误码率的情况下,简单地用反馈中继器替换传统FPGA中插入的中继器。取而代之的是,必须使用非常规的FPGA架构,其中只有正确的信号类型出现在互连网络上。这些体系结构在硬件上更为复杂,其中一些体系结构需要重新定时逻辑实现,这可能会产生很大的影响。在相等面积的基础上,即使考虑到重计时的较大损失因素,这些替代体系结构的性能也得到了显着提高。还表明,通过具有预充电的再生反馈转发器的MOS晶体管的快速信号传播可以与互补传输晶体管逻辑和Domino逻辑元件结合使用,以获得比Domino逻辑更快的动态CMOS逻辑系列。最后,显示出通过在传输线的接收端使用互补的再生反馈转发器,与源匹配相比,可靠的首次入射切换的驱动器阻抗范围可以得到扩展。

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