The design of a current comparator for video-rate analog to digital conversion.

摘要

The fusion of the computer with the consumer electronic device has opened the realm of what is possible. With this, the requirement for converting analog signals into digital signals has dramatically improved and has resulted in an increased focus on analog circuit design. Analog to digital conversion (ADC) is a very important part of this focus and is looked at in this thesis to determine what limitations are restricting improving their performance. After carefully studying the analog to digital process, the comparator is identified as having a major influence on its performance. A novel high speed current comparator is designed and fabricated which avoids many of the limitations which hamper the integratability and performance of the leading comparators of the time, and is presented as the focus of this thesis. The fabricated ADC achieves conversion speeds of 3.9--4.6 MHz at 8bits while the novel current comparator consumes 8 mW of power, and demonstrates a design which could operate in low voltage applications.