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Resonant tunneling measurements of size-induced strain relaxation.

机译:尺寸引起的应变松弛的共振隧穿测量。

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摘要

Lattice mismatch strain available in such semiconductor heterostructures as Si/SiGe or GaAs/AlGaAs can be employed to alter the electronic and optoelectronic properties of semiconductor structures and devices. When deep submicron structures are fabricated from strained material, strained layers relax by sidewall expansion giving rise to size- and geometry-dependent strain gradients throughout the structure. This thesis describes a novel experimental technique to probe the size-induced strain relaxation by studying the tunneling current characteristics of strained p-type Si/SiGe resonant tunneling diodes.; Our current-voltage measurements on submicron strained p-Si/SiGe double- and triple-barrier resonant tunneling structures as a function of device diameter, D, provide experimental access to both the average strain relaxation (which leads to relative shifts in the tunneling current peak positions) and strain gradients (which give rise to a fine structure in the current peaks due to inhomogeneous strain-induced lateral quantization). We find that strain relaxation is significant, with a large fraction of the strain energy relaxed on average in D ≤ 0.25 m m devices. Further, the in-plane potentials that arise from inhomogeneous strain gradients are large. In the D ∼ 0.2 m m devices, the corresponding lateral potentials are approximately parabolic exceeding ∼ 25 meV near the perimeter. These potentials create discrete hole states in double-barrier structures (single well), and coupled hole states in triple-barrier structures (two wells). Our results are in excellent agreement with finite-element strain calculations in which the strained layers are permitted to relax to a state of minimum energy by sidewall expansion.; Size-induced strain relaxation will undoubtedly become a serious technological issue once strained devices are scaled down to the deep submicron regime. Interestingly, our calculations predict and our measurements are consistent with the appearance of a ring-like confined hole ground state at the perimeter of sufficiently small (D ≤ 0.15 m m) p-Si/SiGe devices. Strain relaxation thus promises a novel approach to the fabrication of "ideal" rings with very small diameters.
机译:在诸如Si / SiGe或GaAs / AlGaAs这样的半导体异质结构中可用的晶格失配应变可用于改变半导体结构和器件的电子和光电特性。当深深的亚微米结构由应变材料制成时,应变层会因侧壁膨胀而松弛,从而在整个结构中引起尺寸和几何形状相关的应变梯度。本文通过研究应变p型Si / SiGe谐振隧穿二极管的隧穿电流特性,描述了一种新的实验技术来探测尺寸引起的应变弛豫。我们对亚微米应变p-Si / SiGe双势垒和三势垒谐振隧穿结构的电流-电压测量结果与器件直径D的关系提供了实验方法,可同时获得平均应变弛豫(这会导致隧穿电流发生相对位移)峰值位置)和应变梯度(由于不均匀的应变诱导的横向量化,在电流峰值中产生了精细的结构)。我们发现,应变弛豫非常明显,在D≤0.25 m m的设备中,平均平均有很大一部分应变能得以松弛。此外,由不均匀应变梯度产生的面内电势很大。在D〜0.2 m m的器件中,相应的横向电势近似呈抛物线形,在周边附近超过〜25 meV。这些势能在双势垒结构(单阱)中产生离散的空穴状态,在三势垒结构(两个阱)中产生耦合的空穴状态。我们的结果与有限元应变计算非常吻合,在有限元应变计算中,由于侧壁膨胀,允许应变层松弛到最小能量状态。一旦将应变装置缩小到深亚微米范围,尺寸引起的应变松弛无疑将成为一个严重的技术问题。有趣的是,我们的计算可以预测并且我们的测量与在足够小(D≤0.15 m m)的p-Si / SiGe器件周边出现的环形受限孔基态一致。因此,应变松弛有望为直径很小的“理想”环的制造提供一种新颖的方法。

著录项

  • 作者

    Akyuz, Can Deniz.;

  • 作者单位

    Brown University.;

  • 授予单位 Brown University.;
  • 学科 Physics Condensed Matter.; Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 1999
  • 页码 118 p.
  • 总页数 118
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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