首页> 外文学位 >A 900-MHz low-power CMOS receiver for wireless integrated network sensors.
【24h】

A 900-MHz low-power CMOS receiver for wireless integrated network sensors.

机译:用于无线集成网络传感器的900MHz低功耗CMOS接收器。

获取原文
获取原文并翻译 | 示例

摘要

Wireless Integrated Network Sensors (WINS) has been proposed for various applications. It consists of many smart nodes to perform co-operative detection. The remote sensing nodes are battery-powered and the stringent power limitation poses great challenges in transceiver design. In order to achieve optimal performance at low power, a multi-hop networking scheme is proposed and the link budget characteristics of short RF communication is examined. Furthermore, frequency-hopped spread spectrum technique is adopted in the system to avoid issues of interference.; This dissertation presents a low-power CMOS receiver designed for WINS applications. The receiver path implementation exploits systematic link budget advantage to prevent over-specifications. Furthermore, by virtual of high-Q passive integration, key RF building blocks achieve high performance at low power.; The low-power frequency synthesizer is designed as an integer-N PLL with an LC-VCO. This PLL incorporates binary-weighted switched-capacitor arrays to facilitate VCO's tuning. This is implemented by adding an auxiliary SC tuning loop to the main synthesizer loop. With this technique, the VCO gain (KVCO) can be kept low to improve the PLL phase noise and spur performance, while the overall frequency tuning range is stiff wide. More important, this approach does not raise the total current consumption since the added circuitry can be powered-down once the calibration is complete.; The WINS receiver is designed to operate at the 900 MHz ISM band. Implemented in a 0.6-μm CMOS process, the receiver achieves 45 dB gain, 20 dB NF, IIP3 of −11 dBm, and IIP2 of +12 dBm. The measured VCO phase noise at 100 kHz offset is −100 dBc/Hz and the PLL reference spurs are below −50 dBc. Including the VCO and PLL, the complete receiver dissipates 6.1 mA from a 3-V supply.; Finally, an integration approach combines the elements of high-Q off-chip passive components, chip carriers, and PCB is proposed. It is based on the LTCC technology. Several VCO circuits has been implemented in LTCC and they have demonstrated the feasibility of this integration scheme.
机译:已经提出了用于各种应用的无线集成网络传感器(WINS)。它由许多智能节点组成,可以执行协作检测。遥感节点由电池供电,严格的功率限制对收发器设计提出了巨大挑战。为了在低功率下获得最佳性能,提出了一种多跳组网方案,并研究了短RF通信的链路预算特性。此外,系统采用跳频扩频技术,避免了干扰问题。本文提出了一种专为WINS应用设计的低功耗CMOS接收器。接收器路径实现利用系统的链路预算优势来防止规格过高。此外,通过虚拟的高Q无源集成,关键的RF构建块可在低功耗下实现高性能。低功耗频率合成器设计为具有LC-VCO的整数N PLL。该PLL包含二进制加权开关电容器阵列,以方便VCO的调谐。这是通过在主合成器回路中添加辅助SC调谐回路来实现的。使用这种技术,可以将VCO增益( K VCO )保持较低,以改善PLL相位噪声和杂散性能,而整个频率调谐范围却很宽。更重要的是,这种方法不会增加总电流消耗,因为一旦校准完成就可以关闭附加电路。 WINS接收器设计为在900 MHz ISM频段上运行。该接收器采用0.6-μmCMOS工艺实现,可实现45 dB增益,20 dB NF,-11 dBm的IIP3和+12 dBm的IIP2。在100 kHz偏移处测得的VCO相位噪声为-100 dBc / Hz,而PLL参考杂散低于-50 dBc。包括VCO和PLL,整个接收器从3V电源消耗6.1mA电流。最后,提出了一种将高Q片外无源元件,芯片载体和PCB的元素结合在一起的集成方法。它基于LTCC技术。 LTCC中已经实现了多个VCO电路,它们证明了这种集成方案的可行性。

著录项

  • 作者

    Lin, Tsung-Hsien.;

  • 作者单位

    University of California, Los Angeles.;

  • 授予单位 University of California, Los Angeles.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2001
  • 页码 194 p.
  • 总页数 194
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号