Low frequency noise sources and mechanisms in semiconductor nanowire transistors.

摘要

Semiconductor nanowires are attractive candidates for use in future high-speed electronics, transparent/flexible devices, and chemical sensors. Among other materials, III-V semiconductors have gained considerable interest for their high bulk mobility and low band gap, making them promising for high-speed nanoscale devices. However, nanowire devices also exhibit high levels of low-frequency noise due to their low band gap and high surface-to-volume ratio. The sources and mechanisms of this noise must be understood and controlled in order to realize practical applications of nanowire electronics. This work seeks to understand the underlying noise mechanisms of nanowire transistors in order discover ways to reduce noise levels. It also demonstrates how noise can provide a spectroscopy for analyzing device quality.;Most traditional noise studies tend to apply standard MOSFET models to nanowire noise and transport, which lump together all possible independent noise sources in a nanowire, ignoring effects of the contacts or multiple gates, and could lead to misestimation of the noise figures for a device. This work demonstrates how noise in a nanowire transistor can stem from the channel, ungated access regions, metal- semiconductor contacts, and tunnel barriers, all independently adding to the total noise. Each source of noise can contribute and may dominate the overall noise behavior under certain bias regimes and temperatures, as demonstrated in this work through various device structures and measurements. For example, the contacts can influence noise even below the threshold voltage under certain conditions, emphasizing the need for high-quality metal-semiconductor interface technology.