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Design techniques for low-noise LC voltage-controlled oscillators.

机译:低噪声LC压控振荡器的设计技术。

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摘要

This dissertation investigates several design techniques to improve performance of LC Voltage-Controlled Oscillators (LC-VCO). First, AM-to-FM noise conversion by MOS device parasitics in differential LC-VCOs is examined and it is shown that there is an optimal oscillation amplitude where this conversion is minimum. The optimum amplitude for lowest AM-to-FM conversion also yields the lowest phase noise for this oscillator. The presented analysis is confirmed with simulation and measurement results for a 2-GHz differential nMOS VCO fabricated in a 0.25-mum BiCMOS process.; Next, a tail-current-shaping technique in LC-VCOs is presented to increase the oscillation amplitude and to reduce the phase noise while keeping the power dissipation constant. In this technique, the tail current is made large when the oscillator output voltage reaches its maximum or minimum value and when the sensitivity of the output phase to injected noise is the smallest; the tail current is made small during the zero crossings of the output voltage when the phase noise sensitivity is large. The operation and performance of the presented circuit is extensively analyzed and compared to an ideal pulse-biased technique. The presented analysis is confirmed with measurement results of two 2-GHz differential nMOS VCOs fabricated in a 0.25-mum BiCMOS process.; Then, a low-phase-noise quadrature LC-VCO with inherent tail-current shaping is presented. Two identical differential LC-VCOs are locked in quadrature with a capacitor connected between their common-source nodes. This capacitor further drives the oscillators into a tail-current-shaping mode, which increases their oscillation amplitude and reduces their phase noise. The stability of quadrature operation is analyzed and verified. A multiband 1.9-GHz differential nMOS quadrature LC-VCO prototype has been fabricated in a 0.25-mum BiCMOS process.; Finally, a fully integrated 0.024-mm2 6-GHz LC-VCO for 6+ Gbps high-speed serial (HSS) links in a 90-nm bulk CMOS is presented. It is comparable in size to ring oscillators, but it has better phase noise. It is less than one fifth the size of any LC-VCO reported to date at this frequency. Using a differential control, a very wide tuning range from 4.5 GHz to 7.1 GHz (45%) is achieved. Additionally, a circuit technique employing a differential inductor's center tap is presented to dynamically set the differential tune signals' common mode equal to the VCO's output common mode.
机译:本文研究了几种改善LC压控振荡器性能的设计技术。首先,研究了差分LC-VCO中由MOS器件寄生引起的AM到FM噪声转换,结果表明在这种转换最小的情况下存在最佳振荡幅度。最低的AM到FM转换的最佳幅度也产生了该振荡器的最低相位噪声。通过仿真和测量结果证实了所提出的分析,该结果是采用0.25微米BiCMOS工艺制造的2 GHz差分nMOS VCO。接下来,提出了一种LC-VCO中的尾电流整形技术,以增加振荡幅度并降低相位噪声,同时保持功耗恒定。在这种技术中,当振荡器的输出电压达到最大值或最小值且输出相位对注入噪声的灵敏度最小时,尾电流会变大。当相位噪声灵敏度大时,在输出电压过零时,尾电流变小。对该电路的操作和性能进行了广泛的分析,并与理想的脉冲偏置技术进行了比较。通过0.25um BiCMOS工艺制造的两个2 GHz差分nMOS VCO的测量结果证实了所提出的分析。然后,提出了一种具有固有尾电流整形的低相位噪声正交LC-VCO。两个相同的差分LC-VCO通过一个在其共源节点之间连接的电容器正交锁定。该电容器进一步将振荡器驱动到尾电流整形模式,从而增加了其振荡幅度并降低了其相位噪声。分析并验证了正交运算的稳定性。采用0.25微米BiCMOS工艺制造了一个多频段1.9 GHz差分nMOS正交LC-VCO原型。最后,介绍了在90nm批量CMOS中用于6+ Gbps高速串行(HSS)链路的完全集成的0.024-mm2 6-GHz LC-VCO。它的大小可与环形振荡器相媲美,但具有更好的相位噪声。小于此频率下迄今为止报告的任何LC-VCO的大小的五分之一。使用差分控制,可以实现从4.5 GHz到7.1 GHz的非常宽的调谐范围(45%)。此外,提出了一种采用差分电感器中心抽头的电路技术,以动态设置差分调谐信号的共模等于VCO的输出共模。

著录项

  • 作者

    Soltanian, Babak.;

  • 作者单位

    Columbia University.;

  • 授予单位 Columbia University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2006
  • 页码 150 p.
  • 总页数 150
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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