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A hardware in the loop design methodology for FPGA system and its application to complex functions

机译:FPGA系统的循环设计硬件方法及其在复杂功能中的应用

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摘要

In this work, a unified algorithm-architecture-circuit co-design environment for complex FPGA system development is presented. The main objective is to find an efficient methodology for designing a configurable optimized FPGA system by using as few efforts as possible in verification stage, so as to speed up the development period. A proposed high performance FFT/iFFT processor for Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband (MB-OFDM UWB) system design process is given as an example to demonstrate the proposed methodology. This efficient design methodology is tested and considered to be suitable for almost all types of complex FPGA system designs and verifications.
机译:在这项工作中,提出了用于复杂FPGA系统开发的统一算法,架构,电路协同设计环境。主要目的是找到一种有效的方法,通过在验证阶段进行尽可能少的努力来设计可配置的优化FPGA系统,以加快开发周期。以一个针对多频带正交频分复用超宽带(MB-OFDM UWB)系统设计过程的高性能FFT / iFFT处理器为例,说明了该方法。经过测试,这种有效的设计方法论被认为适用于几乎所有类型的复杂FPGA系统设计和验证。

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