A gm/ID-based synthesis tool for pipelined analog to digital converters

摘要

This paper presents a circuit-level synthesis tool for pipelined ADCs by consulting the circuit-design experience. A top-down systematic design procedure for a conventional pipelined ADC is summarized. In order to decrease the design period for analog circuit sizing, a design automation methodology based on g_m/ID concept is manipulated in the synthesis process. With the proposed design automation flow for pipelined ADCs, the developed synthesis tool can produce satisfactory circuit performance within reasonable simulation time.