首页> 外文会议>Twentieth International Vlsi Multilevel Interconnection Conference (VMIC); Sep 23-25, 2003; Marina del Rey, California >W-via failure and process optimization of interconnect metallization for 0.14 um 256MDRAM
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W-via failure and process optimization of interconnect metallization for 0.14 um 256MDRAM

机译:适用于0.14 um 256MDRAM的W-via失败和互连金属化的工艺优化

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Tungsten chemical vapor deposition (W-CVD) has been widely used for mutlilevel metallization. Because W-CVD process has the advantage of excellent gap-fill ability , it is widely used for high aspect ratio contact or via process. For deep sub-micro process, the aspect ratio increases and gap-fill ability becomes more challenge than before. It was found the via failure phenomenon in backend interconnect metallization of 0.14um process According the related experiment , it shows the root cause is from the via-fill ability issue . By the split condition, it shows the via-fill failure can be fixed by process optimization.
机译:钨化学气相沉积(W-CVD)已广泛用于多级金属化。由于W-CVD工艺具有出色的间隙填充能力的优点,因此被广泛用于高深宽比接触或通孔工艺。对于深亚微工艺,长宽比增加,间隙填充能力比以前更具挑战性。在0.14um工艺的后端互连金属化中发现了通孔失效现象。根据相关实验,表明根本原因是由于通孔填充能力问题。通过分离条件,可以显示通孔填充故障可以通过工艺优化来解决。

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