A Full CMOS 1.5 GHz Highly Linear Broadband Downconversion Mixer

摘要

This paper describes a novel CMOS mixer topology, based on the modulation of nMOS transistors in the triode region. With two extra capacitors added to the cross coupled MOSFET-C lowpass filter structure, GHz signals can be processed while only a low frequency opamp has to be used as output amplifier. The presented mixer is designed for the downconversion of broadband input signals situated in the 1 to 1.5 GHz range. This makes the mixer especially suited for the use in highly integrated receivers for wireless communication. The measured third-order intercept point (IP3) of 45.2 dBm demonstrates the high linearity of the mixer. The mixer is implemented in a 1.2 ¿m CMOS technology. The power consumption is 1.3 mW from a single 5 V power supply. The total chip area is 1 mm², but the HF part occupies only 300 ¿m² of this area.