【24h】

Preparation and Use of Chip Capacitors in Ultra-Dense Multi-Chip Modules

机译:超密多芯片模块中芯片电容器的制备和使用

获取原文
获取原文并翻译 | 示例

摘要

Draper Laboratory designs and produces ultra-dense multi-chip modules that achieve an integration density, which is only exceeded by that of custom ASIC chips. These modules are fabricated by tiling an adhesive coated substrate with bare integrated circuit chips and passive components that are thinned to 150 microns thick. Multiple layers of thin film copper conductors, supported on Kapton film dielectric, are used to route signals between these components. Connections to their I/O pads and between signal layers are made through laser drilled vias, which are copper plated. The various types of capacitors used in modules for RF applications present several fabrication challenges, In comparison to active IC devices, capacitors have wider dimensional tolerances, are more easily damaged by mechanical handling, and are more susceptible to damage during laser drilling of vias. This paper will discuss these issues and the approaches that have been taken to address them.
机译:德雷珀实验室(Draper Laboratory)设计和生产超密度多芯片模块,该模块可实现集成密度,而集成密度仅是定制ASIC芯片所无法达到的。这些模块是通过将涂有粘合剂的基板与裸露的集成电路芯片和薄至150微米厚的无源组件平铺而成的。支撑在Kapton薄膜电介质上的多层薄膜铜导体用于在这些组件之间路由信号。通过镀铜的激光钻孔过孔来连接其I / O焊盘和信号层之间。用于射频应用的模块中使用的各种类型的电容器提出了一些制造挑战。与有源IC器件相比,电容器具有更宽的尺寸公差,更容易受到机械处理的损坏,并且在通孔的激光钻孔过程中更容易受到损坏。本文将讨论这些问题以及解决这些问题所采用的方法。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号