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SiCP Selective Epitaxial Growth in Recessed Source/Drain Regions yielding to Drive Current Enhancement in n-channel MOSFET

机译:在凹陷的源极/漏极区域中进行SiCP选择性外延生长,以驱动n沟道MOSFET增强电流

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In this paper we demonstrate the successful integration ofrnin-situ doped embedded Si:C stressors epitaxially grown in thernsource and drain areas of nMOS devices using a novel CyclicrnDeposition Etch (CDE) process. These layers have substitutional Crncontent ranging between 1% and 2% with potential of achievingrneven higher substitutional carbon concentration. Anotherrndistinctive feature of this process is that it allows for high in-situ Prndoping for ease of integration within a CMOS platform. Werndemonstrate superior performance of strained nMOS devices withrnembedded Si:C showing up to 12.5% on-state current improvementrnover the unstrained reference process. We report on materialrncharacterization results of embedded Si:C stressors, in particular,rnstrain retention properties as a function of subsequent post-epitaxyrnprocessing.
机译:在本文中,我们演示了使用新颖的CyclicrnDeposition Etch(CDE)工艺成功地集成了在nMOS器件的源极和漏极区域外延生长的原位掺杂嵌入式Si:C应力源。这些层的取代Crn含量在1%和2%之间,具有实现甚至更高的取代碳浓度的潜力。该工艺的另一个显着特点是,它允许进行高原位Pr掺杂,从而易于在CMOS平台内集成。展示了嵌入Si:C的应变nMOS器件的优越性能,在未应变的参考过程中,其通态电流改善了12.5%。我们报告了嵌入式Si:C应力源的材料表征结果,特别是应变保留特性随后续外延后处理的函数。

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