首页> 外文会议>Programmable Logic (SPL), 2012 VIII Southern Conference on >Memory-mapped I/O over dual port BRAM on FPGA
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Memory-mapped I/O over dual port BRAM on FPGA

机译:FPGA双端口BRAM上的内存映射I / O

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Nowadays, Direct Memory Access (DMA) is one of the most used mechanisms for data transfer between a processor and its peripherals. Another possibility is to map peripherals directly in the memory space, which has the disadvantage of requiring dual port memories when the device handles large quantities of data. It typically is the case of video and network applications. In this work we propose the use of dual port BRAM often available in modern FPGAs to implement a core using Memory mapped I/O (MMIO). As a case study, we present the development of an AVR microcontroller core with the Media Access Controller (MAC) Ethernet built in. It is capable of running the uIP TCP/IP stack, with a Web Server as example application. Additionally, we discuss the advantages of moving the program code to an external memory that use the Common Flash Interface (CFI) standard. This design was simulated with Free Software tools and it was verified in hardware using a Xilinx Virtex 4 FPGA.
机译:如今,直接内存访问(DMA)是在处理器及其外围设备之间进行数据传输的最常用机制之一。另一种可能性是直接在存储器空间中映射外围设备,这具有以下缺点:当设备处理大量数据时,需要双端口存储器。视频和网络应用通常是这种情况。在这项工作中,我们建议使用现代FPGA中经常可用的双端口BRAM,以使用内存映射I / O(MMIO)来实现内核。作为案例研究,我们介绍了内置媒体访问控制器(MAC)以太网的AVR微控制器内核的开发。它能够运行uIP TCP / IP堆栈,并以Web服务器为例。此外,我们讨论了将程序代码移动到使用通用闪存接口(CFI)标准的外部存储器中的优点。使用免费软件工具对该设计进行了仿真,并使用Xilinx Virtex 4 FPGA在硬件中对其进行了验证。

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