Realisation of a 0.1#mu#m vertial MOSFET with a SiGe source

摘要

A vertical MOSFET with 0.1#mu#m chanel length and a SiGe source has been fabricated using a new low temperature process. Details of the process are presented together with electrical characterisation of the devices. The gate oxide is produced by palsm oxidation at < 150 deg C and an XTEM study demonstrates the lack of orientation dependence of growth and also the presence of Ge in the oxide. The gate electrode is formed by amorphous silicon deposition followed by 700 deg C-RTA to produce polysilicon with lower sheet resistance than a furnace anneal.