Efficient Model Checking and FMEA Analysis with Deterministic Scheduling of Transition-Labeled Finite-State Machines

摘要

A very successful tool for model-driven engineering of embedded systems is finite-state machines whose transitions are labeled with expressions of a common-sense logic. The deployment of models to different platforms and different programming languages makes it more imperative to confirm that the models are correct. However, systems are usually composed of concurrent behaviours, which complicates the potential use of model-checking technology. We structure models composed of several finite-state machines into a vector whose execution is a round-robin sequential off-line schedule. This enables model-checking of the requirements. We illustrate this with two case studies widely discussed in the literature. The models can be executed on diverse platforms, and we utilise the same interpreter to generate the corresponding Kripke structure suitable for verification with tools such as NUSMV.