Hardware Circuit Implementation of Computer-generated Holographic Algorithm

摘要

This paper presents a novel computer-generated hologram algorithm fit to be implemented on hardware circuit, called recurrence formula method. In order to improve the speed of the hologram computation, the computation units based on this algorithm in FPGA chip were implemented by programming the chip with the Very-hight-speed Integrated Circuit Hardware Description Language. The number of the units is determined by the resources of the FPGA chip. Much more computation units can also be implemented by paralleling more FPGA chips to work together. This article will promote the implementation of the computer-generated holographic display technology.