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Rapidly Reconfigurable All-Optical Universal Logic Gates

机译:可快速重新配置的全光通用逻辑门

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摘要

We present designs and simulations for a highly cascadable, rapidly reconfigurable, all-optical, universal logic gate. We will discuss the gate's expected performance, e.g. speed, fanout, and contrast ratio, as a function of the device layout and biasing conditions. The gate is a three terminal on-chip device that consists of: (1) the input optical port, (2) the gate selection port, and (3) the output optical port. The device can be built monolithically using a standard multiple quantum well graded index separate confinement heterostructure laser configuration. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog electrical or optical signal at the gate selection port. Specifically, the same gate can be selected to execute one of the 2 basic unary operations (NOT or COPY), or one of the 6 binary operations (OR, XOR, AND, NOR, XNOR, or NAND), or one of the many logic operations involving more than two inputs. The speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal modulation speed of a laser, which can be on the order of tens of GHz. The reprogrammable nature of the universal gate offers maximum flexibility and interchangeability for the end user since the entire application of a photonic integrated circuit built from cascaded universal logic gates can be changed simply by adjusting the gate selection port signals.
机译:我们介绍了高度可级联,可快速重新配置的全光通用逻辑门的设计和仿真。我们将讨论登机口的预期性能,例如速度,扇出度和对比度,取决于设备布局和偏置条件。栅极是三端片上器件,包括:(1)输入光端口,(2)栅极选择端口,和(3)输出光端口。可以使用标准的多量子阱渐变折射率分离限制异质结构激光器配置单片构建该器件。通过在选通选择端口使用适当的模拟电信号或光信号,可以快速重复地对门进行重新编程,以执行任何基本的数字逻辑运算。具体而言,可以选择相同的门来执行2个基本一元运算(NOT或COPY)之一,或6个二元运算(OR,XOR,AND,NOR,XNOR或NAND)之一,或执行多种之一涉及两个以上输入的逻辑运算。用于逻辑操作以及用于重新编程门功能的门的速度主要限于激光器的小信号调制速度,该信号的调制速度可以在数十GHz的数量级上。通用门的可重编程特性为最终用户提供了最大的灵活性和互换性,因为通过级联通用逻辑门构建的光子集成电路的整个应用都可以通过调节门选择端口信号而简单地改变。

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