Design and Implementation of Low Power Pipeline ADC

摘要

This paper mainly focuses on modeling, design and implementation of pipeline analog to digital converters (ADCs), which has become very popular because of its lower power consumption and reasonably fast conversion rate as compared to other ADC architectures. Non-linearities associated with the Sub-ADC's, Sub-DAC's and gain stages corresponds to error in overall pipeline ADC performance. These non-linearities can be corrected using a gain correction method. In this paper, simulation of various ADC components is done in MATLAB/Simulink environment, which gives correct and fast simulation results.