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A Power Efficient and Fast Transient Response Low Drop-Out Regulator in Standard CMOS Process

机译:标准CMOS工艺中的功率高速且快速的瞬态响应低丢失调节器

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A low drop out regulator (LDO), which can adaptively change driving current to the PMOS gate and have a fast transient response time, is proposed in this paper. As we know, LDO circuits have to provide a regulated output voltage regardless of input voltage variation, load current variation, and process variation. A load transient test will test the transient behavior of changing output loading. In order to get a good performance in a load transient testing, a buffer with current driving capability is usually added in front of PMOS gate to make the transient response faster. This buffer needs to drive the PMOS gate, and it will consume a few quiescent current in LDO circuits. This static quiescent current will occupy a few percentage of power consumption of LDO circuits at a light load condition, and the efficiency of the LDO at a light load condition will be very poor. In this paper, we proposed a new architecture of LDO, which can adaptively change the driving current of the buffer to the PMOS gate. Then we can improve the efficiency of the LDO up to 10% at light load condition. Meanwhile, we can have a fast transient response time. The load transient response time from 1mA to 138mA is about 2μs, which is faster than other reference designs. This chip is manufactured in 0.35μm standard CMOS process, and it consumes 24μA in a light load condition.
机译:在本文中提出了一种低丢弃调节器(LDO),可以自适应地将驱动电流改变为PMOS门并具有快速瞬态响应时间。如我们所知,无论输入电压变化,负载电流变化和工艺变化如何,LDO电路都必须提供调节的输出电压。负载瞬态测试将测试更改输出负载的瞬态行为。为了在负载瞬态测试中获得良好的性能,通常在PMOS门前添加具有电流驱动能力的缓冲器,以使瞬态响应更快。此缓冲区需要驱动PMOS门,并且它将消耗LDO电路中的几个静态电流。这种静态静态电流将在光负荷条件下占据LDO电路的几个功耗,并且LDO在轻负载条件下的效率将非常差。在本文中,我们提出了一种LDO的新架构,可以自适应地将缓冲器的驱动电流改变为PMOS门。然后我们可以在轻负载条件下提高LDO的效率高达10%。同时,我们可以有一个快速的瞬态响应时间。从1mA到138mA的负载瞬态响应时间约为2μs,比其他参考设计快。该芯片在0.35μm标准CMOS工艺中制造,并在轻负载条件下消耗24μA。

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