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Electrical Signature Verification and Fault Localization in High-density DRAM Device Using Atomic Force Probe

机译:原子力探头高密度DRAM装置的电气签名验证与故障定位

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Introduction As the complexity of integrated circuits (IC) in dynamic random access memory (DRAM) devices evolves to smaller feature sizes and higher densities, the task of performing successful failure analysis (FA) is getting increasingly difficult and challenging. Traditional physical FA techniques involving microscopic imaging of plan view or cross sectional structures using scanning electron microscopy (SEM) and/or transmission electron microscopy (TEM) are often not capable of identifying non-visible defects (NVD) such as junction leakage, crystal lattice defects and gate oxide leakage which have gradually become dominant root causes for IC failure.
机译:作为动态随机存取存储器(DRAM)设备中的集成电路(IC)的复杂性演化到更小的特征尺寸和更高的密度,执行成功失败分析(FA)的任务越来越困难和具有挑战性。 涉及使用扫描电子显微镜(SEM)和/或透射电子显微镜(TEM)的平面视图或横截面结构的显微剖视图(SEM)的传统物理FA技术通常不能识别不可见的缺陷(NVD),例如结漏,晶格 缺陷和栅极氧化物泄漏,逐渐成为IC失效的主导原因。

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