Smart photodetector arrays for error control in page-oriented optical memory

摘要

Smart photodetector arrays (SPAs) have been suggested as a means to improve the performance of page-oriented optical memories (POMs). With a SPA interface, the optical data page is received by 2D arrays of 'smart' photodetector elements, replacing conventional CCDs. By integrating on-chip processing with the detector array, SPAs can be designed to perform fast parallel error control and data reduction, thereby providing a more efficient interface between the POM and the electronic host computer. In this paper, we discuss SPA requirements in terms of performance, power and scalability. We then present our design and analysis of a 0.35 micron CMOS smart photodetector array. Our implementation integrates a differential current receiver for optoelectronic signal conversion with a cluster error correction code. This approach provides for high optical sensitivity, low electrical power, and fast parallel error correction to achieve data rates of 10s to 100s of Gbits per second.