USING CONDENSATION TESTING WITH SURFACE INSULATION RESISTANCE MEASUREMENTS FOR QFN RELIABILITY ASSESSMENT

摘要

QFN packages are finding increased uses in higher reliability applications due to their smaller footprints, improved thermal and electrical performance (reference 1) and as such there is increased focus on their reliability performance in harsh environments (references 2 to 5). In order to investigate issues with condensation and surface insulation resistance (SIR), a range of test vehicles were assembled incorporating QFNs alongside other components, using two advanced production lines in Sweden. These produced boards with multiple no clean solder pastes using convection and vapour phase soldering. The aim of the project was to take surface insulation test boards based on the IPC B52 test pattern and assess the impact of conventional SIR testing of QFNs alongside a newly developed condensation test. This condensation test has been driven by an increased requirement to understand the performance of electronic assemblies in humid environments. Whenever there is a significant level of ambient humidity, if parts of the assembly drop beneath the dew point, there is the opportunity for the formation of condensed water on the surface of components and substrate. This can significantly reduce the insulation resistance of the substrate surface, resulting in malfunctioning electronics. Reproducing repeatable levels of condensation during testing can be challenging. Most humidity chambers are designed to achieve stable, well controlled humidity and temperature conditions, but none of these offer condensing options. Therefore the user has to improvise. Existing common approaches include ramping at a fast enough rate to cause condensation, or running chambers very close to 100% relative humidity. A drawback of these approaches is that chambers of different designs will perform differently, and will be sensitive to small drops in cooling performance. At NPL, a new approach has been developed where the test board is mounted on a platen whose temperature can be independently controlled without changing the ambient condition in the humidity chamber. Thus, the temperature of the test board can be depressed below ambient to any desired point and hence, produce condensation at different levels. It is therefore straightforward to cycle between condensing and non-condensing conditions on the test board in a constant ambient environment. The technique has been demonstrated to be repeatable and controllable, with the user able to select a temperature differential that matches their worst in-use conditions, or to understand the performance of their system under a range of condensing conditions. Modification to the test board in this project, allowed the group to test the impact of residues under the QFN/LGA packages with the introduction of SIR test pattern under four packages per board. There have been lots of debate on the reliability of cleanliness under these packages and the possibility of surface corrosion. This work investigates the current uncertainty. This paper will outline the processes and parameters used for the production which featured surface mount reflow and through-hole selective soldering with no clean fluxes. The results from the same boards with different paste products will be compared with testing under traditional exposure to elevated temperature and relatively humidity plus the controlled introduction of moisture to the test board.