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Real-time Multi-channel Vision Processing Based on DSPFPGA

机译:基于DSP&FPGA的实时多通道视觉处理

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In order to realize digital image sequence processing for multi-channel vision in real-time simultaneously, a hardware system with FPGA&DSP is designed. In the system, two ZBT SRAM chips are used as the input and output cache for high data transferring. A FPGA chip is responsible for the core logic controlling and multi-channel video synchronous. Digital videos are sent to the processing module by Camlink bus. Data are exchanged by EMIF and McBSP between FPGA and DSPs. EDMA is used for data transferring between SRAM in FPGA and ZBT SRAM. The QDMA is used for 2D data transferring to 1D into DSP cache. Tasks are assigned to chips by μC/OS on master DSP. All this together, real-time data sampling and processing for multi-channel vision was realized.
机译:为了在同时实时实现多通道视觉的数字图像序列处理,设计了一种具有FPGA和DSP的硬件系统。在系统中,两个ZBT SRAM芯片用作高数据传输的输入和输出缓存。 FPGA芯片负责核心逻辑控制和多通道视频同步。数字视频通过Camlink总线发送到处理模块。数据由EMIF和MCBSP交换FPGA和DSP之间。 EDMA用于FPGA和ZBT SRAM中SRAM之间的数据传输。 QDMA用于将2D数据传输到1D到DSP缓存中。任务被分配给主DSP上的μC/ OS芯片。所有这一切都在一起,实现了多通道视觉的实时数据采样和处理。

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