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Design and Implementation of FPGA Based 32 Bit Floating Point Processor for DSP Application

机译:基于FPGA的32位浮点处理器的设计与实现DSP应用

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The floating point arithmetic operations have discovered applications in the various different fields for the necessities for requirments high precision operation because of its incredible dynamic range, high accuracy and fast arithmetic operations. High accuracy is needed for the design and research of the floating point processing units. With the expanding necessities for the floating point operations for the fast high speed data signal processing and the logical operation, the requirements for the high-speed hardware floating point arithmetic units have turned out to be increasingly requesting. This paper deals with the design and implementation of the 32-bit floating point Processor with MAC unit for signal processing application. The Linear convolution and Circular convolution of signals is verified. The necessary code is written in the language Verilog. Xilinx 14.7 suite is used for software development and then implementation on Spartan 6 board. The designed DSP has instructions set and consists of 32-bit ALU, 32-bit X 32-bit parallel multiplier for single-cycle MAC operation, 2 addressing modes, 31 auxiliary register arithmetic units.
机译:由于其令人难以置信的动态范围,高精度和快速算术运算,浮点算术运算已经发现了需要高精度操作的各种不同领域的应用。浮点处理单元的设计和研究需要高精度。利用快速高速数据信号处理的浮点操作的扩展必需品和逻辑操作,高速硬件浮点算术单元的要求已经越来越多地请求。本文涉及使用MAC单元进行信号处理应用的32位浮点处理器的设计和实现。验证了线性卷积和信号的循环卷积。必要的代码是用语言Verilog编写的。 Xilinx 14.7套件用于软件开发,然后在Spartan 6板上实施。设计的DSP具有指令集,包括32位ALU,32位X 32位并联乘法器,用于单循环MAC操作,2个寻址模式,31辅助寄存器算术单元。

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