CMOS Gilbert Mutiplier for Analog Signal Processing and its FPAA Based Implementation

摘要

Analog signal processing requires multiplier, adder circuits as basic operations. Multiplier circuit is frequently used in neural network implementation, mixer circuit in modulators. In this paper the Gilbert circuit in analog design is implemented in Orcad with 0.35 μm technology and verified. As the chip based hardware circuit realizationis time consuming hence the FPAA based implementation is focused for prototype. AnadigmDesigner2 tool is used for simulation and AN231E04 quad analog processor is used for hardware implementation. CMOS Gilbert multiplier circuit consumes 5mW of power and FPAA with single supply voltage at 3.3V utilizes of 40 mWpower.