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Design Topology: 90 nm Single Stage FGMOS Amplifier Design

机译:设计拓扑:90 nm单级FGMOS放大器设计

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In CMOS technology, Floating-gate Metal-Oxide-Semiconductor (FGMOS) is a new technique that has been introduced in low voltage design due to its low threshold voltage. The operational time of the FGMOS transistor can be improved by controlling the threshold voltage without reducing the feature size of the transistor. Therefore, this research focuses on analyzing and comparing the simulation application of FGMOS technique with conventional MOSFET. Consequently, this paper presents a design topology of single stage FGMOS amplifier design consists of current mirror and differential amplifier circuit using 90nm design technology. The FGMOS differential amplifier is designed based on differential input and single-ended output. A differential signal is defined as one that have equal and lead signal excursions around a fixed potential. This design is simulated and analyzed using Full Custom Synopsys software. The result demonstrates 30.8 dB of gain, 3dB-bandwith of 74.5 kHz, the phase margin of 107°, unity gain bandwidth of 2.44 MHz, power dissipation of 195.4920 μW and slew rate of 5.03 v/μs.
机译:在CMOS技术中,浮栅金属氧化物半导体(FGMOS)是一种新技术,该技术由于其低阈值电压而在低电压设计中引入。通过控制阈值电压,可以改善FGMOS晶体管的操作时间,而不减小晶体管的特征尺寸。因此,本研究侧重于分析和比较FGMOS技术与传统MOSFET的模拟应用。因此,本文介绍了单级FGMOS放大器设计的设计拓扑,包括使用90nm设计技术的电流镜像和差分放大器电路。 FGMOS差分放大器基于差分输入和单端输出设计。差分信号被定义为具有围绕固定电位的相等和引线信号偏移的信号。使用完整的自定义Synopsys软件进行模拟和分析该设计。结果表明了30.8dB的增益,3DB-BANDSWITW为74.5 kHz,相位裕度为107°,UNITITE增益带宽为2.44 MHz,功耗为195.4920μW和5.03V /μs的转换率。

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